1. Field of the Invention
The present invention relates to a flip chip device and a manufacturing method thereof, and more particularly to a flip chip device using a LCD-COG (liquid crystal display-chip on glass) technique.
2. Description of the Prior Art
In flip chip technology the jointed surface of the chip and the substrate form a pad or bump replacing the lead frame used in wire bonding technology. By directly stressing the bump or pad of the jointed surface of the chip and the substrate, electric conduction of the circuit is achieved. Recently, due to advances in the related technology, electronic products are becoming increasingly smaller and lightweight, so the applications of flip chip technology are increasing day by day.
The flip chip device of the prior art is the surface of the chip and the bumps formed by the substrate; the surface of the substrate is daubed with an adhesive and then the chip and the substrate are stressed to complete the flip chip device. Because the thermal expansion coefficient of the chip is different from that of the glass substrate, it may result in a certain degree of warp causing a disproportionate gap in the center and on the edge of the IC chip.
In order to improve upon the above stated disadvantages, U.S. Pat. No. 5,508,228 discloses “compliant electrically connective bumps for an adhesive flip chip integrated circuit device and methods for forming same”. As shown in FIG. 1, a compliant bump includes an IC chip 10, a compliant bump 14 covering a metal layer 16 thereon is formed on a bond pad 12 and connected to glass base 18.
FIG. 2 shows ROC Patent No. 200402859 that discloses “Bump structure and method of making”. A compliant bump includes an IC chip 20 with a plurality of conductive joints 22 and a protective film 26 covering the joints 22, and a compliant bump 28. The compliant bump 28 is formed with a lower metal layer 23, a polymer bump 21, an upper metal layer 24 and a metal layer 25.
However, due to the limits of the initial arrangement of the IC, regardless of whether gold bumps or compliant bumps are used, these bumps will always have a ringed-type arrangement. FIG. 3 shows a plurality of bumps 31 ringed around an IC chip 30. This arrangement may however, have a bad effect when applied to the COG junction. As shown in FIG. 4A, this is a schematic view of a COG of the flip chip device. The IC chip 34 and the substrate 35 are jointed via the bumps 37 and the conductive adhesive 36 (as the anisotropic conductive film). Each bump 37 is arranged under the I/O pad 341 of the IC chip 34, therefore, the bump 37 are disposed on the outer periphery of IC chip 34 as shown in FIG. 3. FIG. 4B shows a drawing of a warped COG of the flip chip device due to the thermal applied force of the prior art. Because the IC chip 34 and the substrate 35 are fixed together, and the thermal expansion coefficient of the IC chip 34 (α=3 ppm) is different from that of the glass substrate 35 (α=4.6 ppm), it causes a certain degree of warp δ according to the distance L from the center of the device (line A represents IC chip 34, and line B represents substrate 35). In other words, with the lager L, the degree of warp 6 of the substrate 35 is larger because the outer periphery of the substrate 35 of IC chip 34 is attached on the outer periphery of IC chip 34.
The inventor of the present invention recognizes the above shortage should be corrected and special effort has been paid to research this field. The present invention is presented with reasonable design and good effect to resolve the above problems.